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dc.rights.license | http://creativecommons.org/licenses/by-nc-nd/4.0 | es_ES |
dc.contributor | Jesus Carlos Pedraza Ortega | es_ES |
dc.contributor | Saúl Tovar Arriaga | es_ES |
dc.contributor | Efrn Gorrostieta Hurtado | es_ES |
dc.contributor | Marco Antonio Aceves Fernández | es_ES |
dc.creator | Carlos Alberto Ramos Arreguin | es_ES |
dc.date.accessioned | 2024-06-10T18:55:50Z | |
dc.date.available | 2024-06-10T18:55:50Z | |
dc.date.issued | 2013-03 | |
dc.identifier.uri | https://ri-ng.uaq.mx/handle/123456789/10724 | |
dc.description | This research presents a methodology for image storage hardware and results in external memory of SRAM type. An Altera FPGA manufactured is employ as platform development. The project is composed from the image acquisition, the internal processing of the data to be stored on external memory, then the stored image is displayed on a screen, the image is processed and transformed into a different one. The results are stored in the same memory, the difference, different memory addresses. This will perform three SRAM memory operations: writing, reading and read/write. To carry out such operations, hardware descriptions are designed to allow interaction with memory and display the data on screen. The test images are in color and a size of 256x256 pixels with a color depth of 8 bits. Digital processing is done in software floating point or integer numbers. The hardware is made either integer or fixed point. The results are compared with testing software for fixed- point formats to use. Also, presents he processing times in software and hardware details | es_ES |
dc.format | es_ES | |
dc.format.extent | 1 recurso en línea (86 páginas) | es_ES |
dc.format.medium | computadora | es_ES |
dc.language.iso | spa | es_ES |
dc.publisher | Universidad Autonoma de Querétaro | es_ES |
dc.relation.requires | No | es_ES |
dc.rights | openAccess | es_ES |
dc.subject | FPGA | es_ES |
dc.subject | SRAM | es_ES |
dc.subject | fixed point | es_ES |
dc.subject.classification | INGENIERÍA Y TECNOLOGÍA | es_ES |
dc.title | Metodología para el almacenamiento de Imagenes y su procesamiento en hardware, FPGA. | es_ES |
dc.type | Tesis de licenciatura | es_ES |
dc.contributor.role | Presidente | es_ES |
dc.contributor.role | Secretario | es_ES |
dc.contributor.role | Suplente | es_ES |
dc.contributor.role | Suplente | es_ES |
dc.degree.name | Maestría en Ciencias de la Computación | es_ES |
dc.degree.department | Facultad de Informática | es_ES |
dc.degree.level | Maestría | es_ES |
dc.format.support | recurso en línea | es_ES |
dc.matricula.creator | 150087 | es_ES |
dc.folio | IFMIN-150087 | es_ES |